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High Speed Analog I/O designer

Salary not specified

As a Hardware Engineer, you will play a key role in designing and optimizing cutting-edge interface buffer chips for DDR/LP5/5X/6, chiplets and beyond in the latest FinFET process nodes. Yo…

San Jose

Broadcom San Jose · 20 Jun 2026

Lead ASIC Design Engineer

Salary not specified

, and architectural mentorship to mid-level and junior engineers on the team. Technical Execution Responsibilities RTL Design: Author

Entry levelSan Jose

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