Senior ATE Technician
Job Title: Senior ATE Technician Location: San Jose, CA Job Description: General requirements for day-to-day
Job Title: Senior ATE Technician Location: San Jose, CA Job Description: General requirements for day-to-day
.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, Computer Engineering, or related discipline. With 10+ years
Job Title: Verification Lead Memory Controller (CHI-G / DFI) Location: San Jose, CA Role Summary: We are seeking... a Verification Lead to own the verification strategy, planning, and execu…
, LTSSM, PHY/SerDes interactions, UVM methodology, assertions, formal verification, emulation, and post-silicon debug support
Job Title: Principal/Lead Design Engineer Memory Controller-(CHI-G / DFI) Location: San Jose, CA Role Summary... expertise in the ARM CHI-G (Coherent Hub Interface Gateway) protocol and DDR…
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